Register Settings - Renesas H8S Series Hardware Manual

16-bit single-chip microcomputer

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Register Settings

Table 15-3 shows a bit map of the registers used by the Smart Card interface.

Bits indicated as 0 or 1 must be set to the value shown. The setting of other bits is described below.

Table 15-3 Smart Card Interface Register Settings

Notes: — : Not used.

* The CKE1 bit must be cleared to 0 when the GM bit in SMR is cleared to 0.

SMR Setting: The GM bit is cleared to 0 in normal Smart Card interface mode, and set to 1 in GSM mode. The O/E bit is

cleared to 0 if the IC card is of the direct convention type, and set to 1 if of the inverse convention type.

Bits CKS1 and CKS0 select the clock source of the on-chip baud rate generator. See section 15.3.5, Clock.

BRR Setting: BRR is used to set the bit rate. See section 15.3.5, Clock, for the method of calculating the value to be set.

SCR Setting: The function of the TIE, RIE, TE, and RE bits is the same as for the normal SCI. For details, see section 14,

Serial Communication Interface (SCI).

Bits CKE1 and CKE0 specify the clock output. When the GM bit in SMR is cleared to 0, set these bits to B'00 if a clock

is not to be output, or to B'01 if a clock is to be output. When the GM bit in SMR is set to 1, clock output is performed.

The clock output can also be fixed high or low.

Smart Card Mode Register (SCMR) Setting:

The SDIR bit is cleared to 0 if the IC card is of the direct convention type, and set to 1 if of the inverse convention type.

The SINV bit is cleared to 0 if the IC card is of the direct convention type, and set to 1 if of the inverse convention type.

The SMIF bit is set to 1 in the case of the Smart Card interface.

Examples of register settings and the waveform of the start character are shown below for the two types of IC card (direct

convention and inverse convention).

Rev.6.00 Oct.28.2004 page 526 of 1016

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