Dma Band Control Register (Dmabcr) - Renesas H8S Series Hardware Manual

7.2.5

DMA Band Control Register (DMABCR)

Bit : 15
DMABCRH : FAE1
Initial value : 0
R/W : R/W
Bit : 7
DMABCRL : DTE1B
Initial value : 0
R/W : R/W
DMABCR is a 16-bit readable/writable register that controls the operation of each DMAC channel.
DMABCR is initialized to H'0000 by a reset, and in hardware standby mode.
Bit 15—Full Address Enable 1 (FAE1): Specifies whether channel 1 is to be used in short address mode or full address
mode.
Bit 15
FAE1
0
1
In short address mode, channels 1A and 1B are used as independent channels.
Bit 14—Full Address Enable 0 (FAE0): Specifies whether channel 0 is to be used in short address mode or full address
mode.
Bit 14
FAE0
0
1
In short address mode, channels 0A and 0B are used as independent channels.
Bit 13—Single Address Enable 1 (SAE1): Specifies whether channel 1B is to be used for transfer in dual address mode
or single address mode.
Bit 13
SAE1
0
1
This bit is invalid in full address mode.
14 13
FAE0 SAE1
0 0
R/W R/W
6 5
DTE1A DTE0B
0 0
R/W R/W
Description
Short address mode
Full address mode
Description
Short address mode
Full address mode
Description
Transfer in dual address mode
Transfer in single address mode
12 11 10
SAE0 DTA1B DTA1A
0 0
R/W R/W R/W
4 3
DTE0A DTIE1B DTIE1A
0 0
R/W R/W R/W
9 8
DTA0B DTA0A
0 0 0
R/W R/W
2 1 0
DTIE0B DTIE0A
0 0 0
R/W R/W
Rev.6.00 Oct.28.2004 page 177 of 1016
(Initial value)
(Initial value)
(Initial value)
REJ09B0138-0600H