Overview Of Functions - Renesas H8S Series Hardware Manual

7.1.3

Overview of Functions

Tables 7-1 (1) and (2) summarize DMAC functions in short address mode and full address mode, respectively.
Table 7-1 (1) Overview of DMAC Functions (Short Address Mode)
Transfer Mode
Dual address mode
•
Sequential mode
 1-byte or 1-word transfer
executed for one transfer request
 Memory address
incremented/decremented by 1
or 2
 1 to 65,536 transfers
•
Idle mode
 1-byte or 1-word transfer
executed for one transfer request
 Memory address fixed
 1 to 65,536 transfers
•
Repeat mode
 1-byte or 1-word transfer
executed for one transfer request
 Memory address incremented/
decremented by 1 or 2
 After specified number of
transfers (1 to 256), initial state is
restored and operation continues
Single address mode
•
1-byte or 1-word transfer executed
for one transfer request
•
Transfer in 1 bus cycle using DACK
pin in place of address specifying I/O
•
Specifiable for sequential, idle, and
repeat modes
Transfer Source Source
•
24/16
TPU channel 0 to
5 compare
match/input
capture A
interrupts
•
SCI transmission
data empty
interrupt
•
SCI reception data
full interrupt
•
A/D converter
conversion end
interrupt
•
External request
•
24/DACK
External request
Address Register Bit Length
Destination
16/24
DACK/24
Rev.6.00 Oct.28.2004 page 167 of 1016
REJ09B0138-0600H