Renesas H8S Series Hardware Manual page 906

ETCR0A—Transfer Count Register 0A
Bit
ETCR0A
Initial value
Read/Write
Sequential
mode
Idle mode
Normal mode
Repeat mode
Block transfer
mode
MAR0BH—Memory Address Register 0BH
MAR0BL—Memory Address Register 0BL
Bit
MAR0BH
Initial value
Read/Write
Bit
MAR0BL
Initial value
Read/Write
IOAR0B—I/O Address Register 0B
Bit
IOAR0B
Initial value
Read/Write
Rev.6.00 Oct.28.2004 page 878 of 1016
REJ09B0138-0600H
:
15 14 13 12
:
:
* * * *
:
R/W R/W R/W R/W R/W
Transfer number storage register
Block size storage register
:
31 30 29 28 27
:
— — — — —
:
0 0 0
0
:
— — — — —
:
15 14 13 12 11
:
:
* * * *
:
R/W R/W R/W R/W R/W
In short address mode: Specifies transfer source/transfer destination address
In full address mode: Specifies transfer destination address
:
15 14 13 12 11
:
:
* * * *
:
R/W R/W R/W R/W R/W
In short address mode: Specifies transfer source/transfer destination address
In full address mode: Not used
H'FEE6
11 10 9 8 7
* * * * *
R/W R/W R/W R/W
Transfer counter
H'FEE8
H'FEEA
26 25 24 23
— — —
0 0 0 0
*
— — — R/W
10 9 8 7
* * * * *
R/W R/W R/W R/W
H'FEEC
10 9 8 7
* * * * *
R/W R/W R/W R/W
DMAC
6 5 4 3 2
* * * * *
R/W R/W R/W R/W R/W
Transfer counter
Block size counter
* : Undefined
DMAC
DMAC
22 21 20 19 18
* * * * *
R/W R/W R/W R/W R/W
6 5 4 3 2
* * * * *
R/W R/W R/W R/W R/W
* : Undefined
DMAC
6 5 4 3 2
* * * * *
R/W R/W R/W R/W R/W
* : Undefined
1 0
* *
R/W R/W
17 16
* *
R/W R/W
1 0
* *
R/W R/W
1 0
* *
R/W R/W