Renesas H8S Series Hardware Manual page 886

TIER4—Timer Interrupt Enable Register 4
Bit :
Initial value :
Read/Write :
Rev.6.00 Oct.28.2004 page 858 of 1016
REJ09B0138-0600H
7 6 5
TTGE — TCIEU
0 1 0
R/W — R/W
Overflow Interrupt Enable
Underflow Interrupt Enable
0 Interrupt requests (TCIU) by TCFU disabled
1
Interrupt requests (TCIU) by TCFU enabled
A/D Conversion Start Request Enable
0 A/D conversion start request generation disabled
1
A/D conversion start request generation enabled
H'FE94
4 3
2
TCIEV — —
0 0 0
R/W —
—
0
Interrupt requests (TCIV) by TCFV disabled
1
Interrupt requests (TCIV) by TCFV enabled
TPU4
0
1
TGIEB TGIEA
0 0
R/W R/W
TGR Interrupt Enable A
0 Interrupt requests (TGIA)
by TGFA bit disabled
1
Interrupt requests (TGIA)
by TGFA bit enabled
TGR Interrupt Enable B
0 Interrupt requests (TGIB) by
TGFB bit disabled
1 Interrupt requests (TGIB) by
TGFB bit enabled