Renesas H8S Series Hardware Manual page 408

16-bit single-chip microcomputer
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Example of Buffer Operation Setting Procedure: Figure 10-18 shows an example of the buffer operation setting
procedure.
Buffer operation
Select TGR function
Set buffer operation
<Buffer operation>
Examples of Buffer Operation
• When TGR is an output compare register
Figure 10-19 shows an operation example in which PWM mode 1 has been designated for channel 0, and buffer
operation has been designated for TGRA and TGRC. The settings used in this example are TCNT clearing by compare
match B, 1 output at compare match A, and 0 output at compare match B.
As buffer operation has been set, when compare match A occurs the output changes and the value in buffer register
TGRC is simultaneously transferred to timer general register TGRA. This operation is repeated each time compare
match A occurs.
For details of PWM modes, see section 10.4.6, PWM Modes.
TCNT value
TGR0B
TGR0A
H'0000
H'0200
TGR0C
Transfer
TGR0A
TIOCA
Rev.6.00 Oct.28.2004 page 380 of 1016
REJ09B0138-0600H
[1]
[2]
Start count
[3]
Figure 10-18 Example of Buffer Operation Setting Procedure
H'0200
H'0450
H'0200
Figure 10-19 Example of Buffer Operation (1)
[1] Designate TGR as an input capture register or
output compare register by means of TIOR.
[2] Designate TGR for buffer operation with bits
BFA and BFB in TMDR.
[3] Set the CST bit in TSTR to 1 to start the count
operation.
H'0450
H'0520
H'0450
H'0520
Time

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