Software Protection - Renesas H8S Series Hardware Manual

19.19.2 Software Protection

Software protection can be implemented by setting the SWE bit in flash memory control register 1 (FLMCR1), erase
block registers 1 and 2 (EBR1, EBR2), and the RAMS bit in the RAM emulation register (RAMER). When software
protection is in effect, setting the P or E bit in FLMCR1 does not cause a transition to program mode or erase mode. (See
table 19-38.)
Table 19-38 Software Protection
Item
SWE bit protection
Block specification
protection
Emulation protection •
Description
•
Clearing the SWE bit to 0 in FLMCR1 sets
the program/erase-protected state for all
blocks
(Execute in on-chip RAM or external
memory.)
•
Erase protection can be set for individual
blocks by settings in erase block registers
1 and 2 (EBR1, EBR2).
•
Setting EBR1 and EBR2 to H'00 places all
blocks in the erase-protected state.
Setting the RAMS bit to 1 in the RAM
emulation register (RAMER) places all
blocks in the program/erase-protected
state.
Functions
Program Erase
Yes Yes
— Yes
Yes Yes
Rev.6.00 Oct.28.2004 page 643 of 1016
REJ09B0138-0600H