Renesas H8S Series Hardware Manual page 212

Bit 11—Block Enable (BLKE): These bits specify whether normal mode or block transfer mode is to be used. If block
transfer mode is specified, the BLKDIR bit specifies whether the source side or the destination side is to be the block area.
Bit 12
BLKDIR
0
1
For operation in normal mode and block transfer mode, see section 7.5, Operation.
Bits 10 to 7—Reserved: Can be read or written to. Write 0 to these bits.
Bit 6—Destination Address Increment/Decrement (DAID)
Bit 5—Destination Address Increment/Decrement Enable (DAIDE): These bits specify whether destination address
register MARB is to be incremented, decremented, or left unchanged, when data transfer is performed.
Bit 6
DAID
0
1
Bit 4—Reserved: Can be read or written to. Write 0 to this bit.
Bits 3 to 0—Data Transfer Factor (DTF3 to DTF0): These bits select the data transfer factor (activation source). The
factors that can be specified differ between normal mode and block transfer mode.
• Normal Mode
Bit 3 Bit 2
DTF3 DTF2
0 0
1
×
1
Rev.6.00 Oct.28.2004 page 184 of 1016
REJ09B0138-0600H
Bit 11
BLKE Description
0 Transfer in normal mode
1 Transfer in block transfer mode, destination side is block area
0 Transfer in normal mode
1 Transfer in block transfer mode, source side is block area
Bit 5
DAIDE Description
0 MARB is fixed
1 MARB is incremented after a data transfer
•
When DTSZ = 0, MARB is incremented by 1 after a transfer
•
When DTSZ = 1, MARB is incremented by 2 after a transfer
0 MARB is fixed
1 MARB is decremented after a data transfer
•
When DTSZ = 0, MARB is decremented by 1 after a transfer
•
When DTSZ = 1, MARB is decremented by 2 after a transfer
Bit 1 Bit 0
DTF1 DTF0
0 0
1
1 0
1
×
0
1 0
1
× ×
Description
—
—
Activated by DREQ pin falling edge input
Activated by DREQ pin low-level input
—
Auto-request (cycle steal)
Auto-request (burst)
—
(Initial value)
(Initial value)
(Initial value)
×: Don't care