Renesas H8S Series Hardware Manual page 881

TIER3—Timer Interrupt Enable Register 3
Bit
Initial value
Read/Write
: 7 6 5
TTGE — —
: 0 1 0
: R/W — —
A/D Conversion Start Request Enable
0 A/D conversion start request generation disabled
1 A/D conversion start request generation enabled
H'FE84
4 3 2
TCIEV TGIED TGIEC
0 0 0
R/W R/W R/W
TGR Interrupt Enable C
Interrupt requests (TGIC) by
0
TGFC bit disabled
1 Interrupt requests (TGIC) by
TGFC bit enabled
TGR Interrupt Enable D
0
Interrupt requests (TGID) by TGFD
bit disabled
1
Interrupt requests (TGID) by TGFD
bit enabled
Overflow Interrupt Enable
0 Interrupt requests (TCIV) by TCFV disabled
1 Interrupt requests (TCIV) by TCFV enabled
TPU3
1 0
TGIEB TGIEA
0 0
R/W R/W
TGR Interrupt Enable A
0 Interrupt requests (TGIA)
by TGFA bit disabled
1
Interrupt requests (TGIA)
by TGFA bit enabled
TGR Interrupt Enable B
0 Interrupt requests (TGIB)
by TGFB bit disabled
Interrupt requests (TGIB)
1
by TGFB bit enabled
Rev.6.00 Oct.28.2004 page 853 of 1016
REJ09B0138-0600H