Renesas H8S Series Hardware Manual page 753

Item
Programming Wait time after SWE bit clear*
Erase
Notes: 1. Settings of each time must comply with algorithm of writing/erasing.
2. Writing time for 128 bytes: indicates the total period in which bit P of flash memory control register 1 (FLMCR1)
is set. Writing verification time is not included.
3. Erasing time for one block: indicates the period in which bit E of FLMCR1 is set. Erasing verification time is not
included.
4. Maximum writing time: t
5. The maximum writing count (N) must be set to the maximum writing time (t
set value (z). Wait time (z) must be switched after setting of bit P according to writing count (n).
Writing count n
1 ≤ n ≤ 6
7 ≤ n ≤ 1000
[In additional writing]
Writing count n
1 ≤ n ≤ 6
6. Wait time (z) after setting of bit E and the maximum erasing count (N) have the following relationship to the
maximum erasing time (t
(max) = wait time (z) after setting of bit E × maximum erasing count (N)
t
E
Maximum programming
1 4
count* *
Wait time after SWE bit
1
setting*
Wait time after ESU bit
1
setting*
Wait time after E bit setting*
Wait time after E bit clear*
Wait time after ESU bit clear*
Wait time after EV bit setting*
Wait time after H'FF dummy
1
write*
Wait time after EV bit clear*
Wait time after SWE bit clear*
1
Maximum erase count*
(max) = Σ wait time (z) after setting of bit P
P
z = 30 µs
z = 200 µs
z = 10 µs
(max)).
E
Symbol Min
θ
1
100
N —
x 1
y 100
1 6
* z —
α
1
10
β
1
10
γ
1
20
ε
2
η
1
4
θ
1
100
6
N —
*
Typ Max Unit
µs
— —
5
— 1000* Times
µs
— —
µs
— —
— 10 ms
µs
— —
µs
— —
µs
— —
µs
— —
µs
— —
µs
— —
— 100 Times
(max)) or less according the actual
P
Rev.6.00 Oct.28.2004 page 725 of 1016
Test
Condition
Erase time
wait
REJ09B0138-0600H