Renesas H8S Series Hardware Manual page 359

Pin Selection Method and Pin Functions
PF /LCAS/WAIT/ The pin function is switched as shown below according to the combination of
2
BREQO
the operating mode, and bits RMTS2 to RMTS0, LCASS, BREQOE, WAITE,
ABW5 to ABW2, and PF2DDR.
Operating
Mode
LCASS
BREQOE
WAITE
PF2DDR
Pin function
Note: 1. Only in DRAM space 16-bit access in modes 4 to 6 when RMTS2 to
PF /BACK The pin function is switched as shown below according to the combination of
1
the operating mode, and bits BRLE and PF1DDR.
Operating
Mode
BRLE
PF1DDR
Pin function
Note: * Modes 6 and 7 are provided in the on-chip ROM version only.
PF /BREQ The pin function is switched as shown below according to the combination of
0
the operating mode, and bits BRLE and PF0DDR.
Operating
Mode
BRLE
PF0DDR
Pin function
Note: * Modes 6 and 7 are provided in the on-chip ROM version only.
1
0*
—
—
— 0
LCAS
PF
output input
pin pin
RMTS0 = B'001 to B'011.
2. Modes 6 and 7 are provided in the on-chip ROM version only.
Modes 4 to 6*
0
0
PF
1
input pin
Modes 4 to 6*
0
0
PF
0
input pin
2
Modes 4 to 6*
1
0
0 1
1 —
WAIT BREQO
PF
2 2
output input output
pin pin
1
1 —
BACK
PF
1
output pin output pin
1
1 —
BREQ
PF
0
output pin input pin
Rev.6.00 Oct.28.2004 page 331 of 1016
2
Mode 7*
—
1 —
— —
— 0 1
PF PF
2 2
input output
pin pin pin
Mode 7*
—
0 1
PF PF
1 1
input pin output pin
Mode 7*
—
0 1
PF PF
0 0
input pin output pin
REJ09B0138-0600H