Block Diagram; Pin Configuration - Renesas H8S Series Hardware Manual

14.1.2

Block Diagram

Figure 14-1 shows a block diagram of the SCI.
RxD
TxD
SCK
Legend:
SCMR:
Smart Card mode register
RSR:
Receive shift register
RDR:
Receive data register
TSR:
Transmit shift register
TDR:
Transmit data register
SMR:
Serial mode register
SCR:
Serial control register
SSR:
Serial status register
BRR:
Bit rate register
14.1.3

Pin Configuration

Table 14-1 shows the serial pins for each SCI channel.
Table 14-1 SCI Pins
Channel
0
1
2
Module data bus
RDR TDR
RSR TSR
Parity generation
Parity check
Figure 14-1 Block Diagram of SCI
Pin Name Symbol
Serial clock pin 0 SCK0
Receive data pin 0 RxD0
Transmit data pin 0 TxD0
Serial clock pin 1 SCK1
Receive data pin 1 RxD1
Transmit data pin 1 TxD1
Serial clock pin 2 SCK2
Receive data pin 2 RxD2
Transmit data pin 2 TxD2
BRR
SCMR
SSR
SCR
Baud rate
SMR
generator
Transmission/
reception control
Clock
External clock
I/O Function
I/O SCI0 clock input/output
Input SCI0 receive data input
Output SCI0 transmit data output
I/O SCI1 clock input/output
Input SCI1 receive data input
Output SCI1 transmit data output
I/O SCI2 clock input/output
Input SCI2 receive data input
Output SCI2 transmit data output
Internal
data bus
ø
ø/4
ø/16
ø/64
TEI
TXI
RXI
ERI
Rev.6.00 Oct.28.2004 page 467 of 1016
REJ09B0138-0600H