Renesas H8S Series Hardware Manual page 333

Mode 6 (On-Chip ROM Version Only): In mode 6, port A pins function as address outputs or input ports and interrupt
input pins. Input or output can be specified on an individual bit basis. Setting a PADDR bit to 1 makes the corresponding
port A pin an address output, while clearing the bit to 0 makes the pin an input port.
Port A pin functions in mode 6 are shown in figure 9-9.
Modes 4 and 5: In modes 4 and 5, the lower 5 bits of port A are designated as address outputs automatically, while the
upper 3 bits function as address outputs or input ports and interrupt input pins. Input or output can be specified
individually for the upper 3 bits. Setting one of bits PA7DDR to PA5DDR to 1 makes the corresponding port A pin an
address output, while clearing the bit to 0 makes the pin an input port.
Port A pin functions in modes 4 and 5 are shown in figure 9-10.
When PADDR = 1
A (output)
23
A (output)
22
A (output)
21
A (output)
20
Port A
A (output)
19
A (output)
18
A (output)
17
A (output)
16
Figure 9-9 Port A Pin Functions (Mode 6)
When PADDR = 1
A (output)
23
A (output)
22
A (output)
21
A (output)
20
Port A
A (output)
19
A (output)
18
A (output)
17
A (output)
16
Figure 9-10 Port A Pin Functions (Modes 4 and 5)
When PADDR = 0
PA (input)/IRQ7 (input)
7
PA (input)/IRQ6 (input)
6
PA (input)/IRQ5 (input)
5
A (output)
20
A (output)
19
A (output)
18
A (output)
17
A (output)
16
When PADDR = 0
PA (input)/IRQ7 (input)
7
PA (input)/IRQ6 (input)
6
PA (input)/IRQ5 (input)
5
PA (input)/IRQ4 (input)
4
PA (input)
3
PA (input)
2
PA (input)
1
PA (input)
0
Rev.6.00 Oct.28.2004 page 305 of 1016
REJ09B0138-0600H