Repeat Mode - Renesas H8S Series Hardware Manual

16-bit single-chip microcomputer
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8.3.6

Repeat Mode

In repeat mode, one operation transfers one byte or one word of data.
From 1 to 256 transfers can be specified. Once the specified number of transfers have ended, the initial state of the
transfer counter and the address register specified as the repeat area is restored, and transfer is repeated. In repeat mode the
transfer counter value does not reach H'00, and therefore CPU interrupts cannot be requested when DISEL = 0.
Table 8-6 lists the register information in repeat mode and figure 8-7 shows memory mapping in repeat mode.
Table 8-6
Register Information in Repeat Mode
Name
DTC source address register
DTC destination address register
DTC transfer count register AH
DTC transfer count register AL
DTC transfer count register B
SAR or
DAR
Abbreviation
SAR
DAR
CRAH
CRAL
CRB
Repeat area
Transfer
Figure 8-7 Memory Mapping in Repeat Mode
Function
Designates source address
Designates destination address
Holds number of transfers
Designates transfer count
Not used
Rev.6.00 Oct.28.2004 page 257 of 1016
DAR or
SAR
REJ09B0138-0600H

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