Renesas H8S Series Hardware Manual page 47

Type Symbol
A/D converter AN7 to
AN0
ADTRG
D/A converter DA1, DA0
A/D converter AV
CC
and D/A
converter
AV
SS
V
ref
I/O ports P1 to
7
P1
0
P2 to
7
P2
0
P3 to
5
P3
0
P4 to
7
P4
0
P5 to
3
P5
0
P6 to
7
P6
0
PA to
7
PA
0
Pin No.
TFP-120 FP-128B I/O
102 to 112 to Input
95 105
92 102 Input
102, 101 112, 111 Output Analog output: D/A converter
93 103 Input
103 113 Input
94 104 Input
112 to 122 to I/O
105 115
71 to 64 79 to 72 I/O
58 to 53 64 to 59 I/O
102 to 112 to Input
95 105
92 to 89 102, 101, I/O
98, 97
63 to 60, 71 to 69, I/O
32 to 29 66, 38, 37,
34, 33
28 to 25, 32 to 29, I/O
23 to 20 27 to 24
Name and Function
Analog 7 to 0: Analog input pins.
A/D conversion external trigger
input: Pin for input of an external
trigger to start A/D conversion.
analog output pins.
This is the power supply pin for the
A/D converter and D/A converter.
When the A/D converter and D/A
converter are not used, this pin
should be connected to the system
power supply (+5 V).
This is the ground pin for the A/D
converter and D/A converter.
This pin should be connected to the
system power supply (0 V).
This is the reference voltage input pin
for the A/D converter and D/A
converter.
When the A/D converter and D/A
converter are not used, this pin
should be connected to the system
power supply (+5 V).
Port 1: An 8-bit I/O port. Input or
output can be designated for each bit
by means of the port 1 data direction
register (P1DDR).
Port 2: An 8-bit I/O port. Input or
output can be designated for each bit
by means of the port 2 data direction
register (P2DDR).
Port 3: A 6-bit I/O port. Input or
output can be designated for each bit
by means of the port 3 data direction
register (P3DDR).
Port 4: An 8-bit input port.
Port 5: A 4-bit I/O port. Input or
output can be designated for each bit
by means of the port 5 data direction
register (P5DDR).
Port 6: An 8-bit I/O port. Input or
output can be designated for each bit
by means of the port 6 data direction
register (P6DDR).
Port A: An 8-bit I/O port. Input or
output can be designated for each bit
by means of the port A data direction
register (PADDR).
Rev.6.00 Oct.28.2004 page 19 of 1016
REJ09B0138-0600H