Interrupt Exception Handling Sequence - Renesas H8S/2319 series Hardware Manual

Renesas 16-bit single-chip microcomputer
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5.4.4

Interrupt Exception Handling Sequence

Figure 5-7 shows the interrupt exception handling sequence. The example shown is for the case
where interrupt control mode 0 is set in advanced mode, and the program area and stack area are
in on-chip memory.
Rev. 5.00, 12/03, page 131 of 1088

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