Renesas H8S Series Hardware Manual page 789

(3) Bus Timing
Table 22-38 lists the bus timing.
Table 22-38 Bus Timing
= 5.0 V ± 10%, AV
Condition B: V
CC
V = AV
SS
T = –40 to +85°C (wide-range specifications)
a
Condition C: V = 3.0 to 5.5 V, AV
CC
V = AV
SS
T = –40 to +85°C (wide-range specifications)
a
Item
Address delay time
Address setup time
Address hold time
Precharge time
CS delay time 1
CS delay time 2
CS delay time 3
AS delay time
RD delay time 1
RD delay time 2
CAS delay time
Read data setup time
Read data hold time
Read data access
time 1
Read data access
time 2
Read data access
time 3
Read data access
time 4
Read data access
time 5
WR delay time 1
WR delay time 2
WR pulse width 1
WR pulse width 2
= 5.0 V ± 10%, V
CC
= 0 V, ø= 2 to 20 MHz, T
SS
= 3.0 to 5.5 V, V
CC
= 0 V, ø = 2 to 13 MHz, T
SS
Symbol Min
t —
AD
0.5 ×
t
AS
t
0.5 ×
t
AH
t
1.5 ×
t
PCH
t
t —
CSD1
t —
CSD2
t —
CSD3
t —
ASD
t —
RSD1
t —
RSD2
t —
CASD
t 15
RDS
t 0
RDH
t —
ACC1
t —
ACC2
t —
ACC3
t —
ACC4
t —
ACC5
t —
WRD1
t —
WRD2
1.0 ×
t
WSW1
t
1.5 ×
t
WSW2
t
= 4.5 V to AV
ref
= –20 to +75°C (regular specifications),
a
= 3.0 V to AV
ref
= –20 to +75°C (regular specifications),
a
Condition B Condition C
Max Min
20 —
0.5 ×
—
– 15 t – 30
cyc cyc
0.5 ×
—
– 10 t – 20
cyc cyc
1.5 ×
—
– 20 t – 40
cyc cyc
20 —
20 —
25 —
20 —
20 —
20 —
20 —
— 30
— 0
1.0 ×
—
t – 25
cyc
1.5 ×
—
t – 25
cyc
2.0 ×
—
t – 25
cyc
2.5 ×
—
t – 25
cyc
3.0 ×
—
t – 25
cyc
20 —
20 —
1.0 ×
—
– 20 t – 40
cyc cyc
1.5 ×
—
– 20 t – 40
cyc cyc
,
CC
,
CC
Max Unit Test Conditions
40 ns Figure 22-72 to
Figure 22-79
— ns
— ns
— ns
40 ns
40 ns
40 ns
40 ns
40 ns
40 ns
40 ns
— ns
— ns
1.0 ×
ns
t – 50
cyc
1.5 ×
ns
t – 50
cyc
2.0 ×
ns
t – 50
cyc
2.5 ×
ns
t – 50
cyc
3.0 ×
ns
t – 50
cyc
40 ns
40 ns
— ns
— ns
Rev.6.00 Oct.28.2004 page 761 of 1016
REJ09B0138-0600H