Renesas H8S Series Hardware Manual page 241

16-bit single-chip microcomputer
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Transfer requests (activation sources) consist of A/D converter conversion end interrupts, external requests, SCI
transmission data empty and reception data full interrupts, and TPU channel 0 to 5 compare match/input capture A
interrupts.
For details, see section 7.3.4, DMA Control Register (DMACR).
Figure 7-16 shows an example of the setting procedure for block transfer mode.
(DTE = DTME = 1)
Transfer request?
Read address specified by MARA
MARA = MARA + SAIDE·(–1)
Write to address specified by MARB
MARB = MARB + DAIDE·(–1)
ETCRAL = ETCRAL–1
ETCRAL = H'00
ETCRAL = ETCRAH
MARB = MARB – DAIDE·(–1)
MARA = MARA – SAIDE·(–1)
ETCRB = ETCRB – 1
No
ETCRB = H'0000
Clear DTE bit to 0
Figure 7-15 Operation Flow in Block Transfer Mode
Start
No
Yes
Acquire bus
SAID
DTSZ
·2
DAID
DTSZ
·2
No
Yes
Release bus
No
BLKDIR = 0
Yes
DAID
DTSZ
·2
·ETCRAH
SAID
DTSZ
·2
·ETCRAH
Yes
to end transfer
Rev.6.00 Oct.28.2004 page 213 of 1016
REJ09B0138-0600H

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