Module Stop Control Register (Mstpcr) - Renesas H8S Series Hardware Manual

14.2.10 Module Stop Control Register (MSTPCR)

Bit : 15 14
Initial value : 0 0
R/W : R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
MSTPCR is a 16-bit readable/writable register that performs module stop mode control.
When the corresponding bit of bits MSTP7 to MSTP5 is set to 1, SCI operation stops at the end of the bus cycle and a
transition is made to module stop mode. Registers cannot be read or written to in module stop mode. For details, see
section 21.5, Module Stop Mode.
MSTPCR is initialized to H'3FFF by a reset and in hardware standby mode. It is not initialized in software standby mode.
Bit 7—Module Stop (MSTP7): Specifies the SCI channel 2 module stop mode.
Bit 7
MSTP7
0
1
Bit 6—Module Stop (MSTP6): Specifies the SCI channel 1 module stop mode.
Bit 6
MSTP6
0
1
Bit 5—Module Stop (MSTP5): Specifies the SCI channel 0 module stop mode.
Bit 5
MSTP5
0
1
Rev.6.00 Oct.28.2004 page 486 of 1016
REJ09B0138-0600H
MSTPCRH
13 12 11 10
1 1 1 1
Description
SCI channel 2 module stop mode cleared
SCI channel 2 module stop mode set
Description
SCI channel 1 module stop mode cleared
SCI channel 1 module stop mode set
Description
SCI channel 0 module stop mode cleared
SCI channel 0 module stop mode set
MSTPCRL
9 8 7 6 5
1 1 1 1 1
4 3 2 1 0
1 1 1 1 1
(Initial value)
(Initial value)
(Initial value)