External Trigger Input Timing; Interrupts - Renesas H8S Series Hardware Manual

16-bit single-chip microcomputer

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External Trigger Input Timing

A/D conversion can be externally triggered. When the TRGS1 and TRGS0 bits are set to 11 in ADCR, external trigger

input is enabled at the ADTRG pin. A falling edge at the ADTRG pin sets the ADST bit to 1 in ADCSR, starting A/D

conversion. Other operations, in both single and scan modes, are the same as if the ADST bit has been set to 1 by

software. Figure 16-6 shows the timing.

Internal trigger signal

The A/D converter generates an A/D conversion end interrupt (ADI) at the end of A/D conversion. ADI interrupt requests

can be enabled or disabled by means of the ADIE bit in ADCSR.

The DTC or DMAC can be activated by an ADI interrupt. Having the converted data read by the DTC or DMAC in

response to an ADI interrupt enables continuous conversion to be achieved without imposing a load on software.

The A/D converter interrupt source is shown in table 16-5.

Table 16-5 A/D Converter Interrupt Source

Interrupt Source

Rev.6.00 Oct.28.2004 page 550 of 1016

REJ09B0138-0600H

Figure 16-6 External Trigger Input Timing

Interrupt due to end of conversion

A/D conversion

DTC or DMAC Activation