Reset Sequence - Renesas H8S Series Hardware Manual

4.2.3

Reset Sequence

The H8S/2357 Group enters the reset state when the RES pin goes low.
To ensure that the H8S/2357 Group is reset, hold the RES pin low for at least 20 ms at power-up. To reset the H8S/2357
Group during operation, hold the RES pin low for at least 20 states.
When the RES pin goes high after being held low for the necessary time, the H8S/2357 Group starts reset exception
handling as follows:
1. The internal state of the CPU and the registers of the on-chip supporting modules are initialized, the T bit is cleared to
0 in EXR, and the I bit is set to 1 in EXR and CCR.
2. The reset exception handling vector address is read and transferred to the PC, and program execution starts from the
address indicated by the PC.
Figure 4-2 show examples of the reset sequence.
RES
Address bus
RD
HWR, LWR
D
15
(1) (3) Reset exception handling vector address ((1) = H'000000, (3) = H'000002)
(2) (4) Start address (contents of reset exception handling vector address)
(5) Start address ((5) = (2) (4))
(6) First program instruction
Note: * 3 program wait states are inserted.
ø
to D
0
Figure 4-2 Reset Sequence (Mode 4)
Internal
Vector fetch
processing
* *
(1) (3)
High
(2) (4)
Prefetch of first
program instruction
*
(5)
(6)
Rev.6.00 Oct.28.2004 page 75 of 1016
REJ09B0138-0600H