Renesas H8S Series Hardware Manual page 790

Item
Write data delay time
Write data setup time
Write data hold time
WR setup time
WR hold time
CAS setup time
WAIT setup time
WAIT hold time
BREQ setup time
BACK delay time
Bus-floating time
BREQO delay time
(4) DMAC Timing
Table 22-39 lists the DMAC timing.
Table 22-39 DMAC Timing
= 5.0 V ± 10%, AV
Condition B: V
CC
V = AV
SS
T = –40 to +85°C (wide-range specifications)
a
Condition C: V = 3.0 V to 5.5 V, AV
CC
= –20 to +75°C (regular specifications), T
Item
DREQ setup time
DREQ hold time
TEND delay time
DACK delay time 1
DACK delay time 2
Rev.6.00 Oct.28.2004 page 762 of 1016
REJ09B0138-0600H
Symbol Min
t —
WDD
0.5 ×
t
WDS
t
cyc
0.5 ×
t
WDH
t
cyc
0.5 ×
t
WCS
t
cyc
0.5 ×
t
WCH
t
cyc
0.5 ×
t
CSR
t
cyc
t 30
WTS
t 5
WTH
t 30
BRQS
t —
BACD
t —
BZD
t —
BRQOD
= 5.0 V ± 10%, V
CC
= 0 V, ø = 2 to 20 MHz, T
SS
= 3.0 V to 5.5 V, V
CC
Symbol
t
DRQS
t
DRQH
t
TED
t
DACD1
t
DACD2
Condition B Condition C
Max Min
30 —
0.5 ×
—
– 20 t – 36
cyc
0.5 ×
—
– 10 t – 20
cyc
0.5 ×
—
– 10 t – 20
cyc
0.5 ×
—
– 10 t – 20
cyc
0.5 ×
—
– 10 t – 20
cyc
— 60
— 10
— 60
15 —
50 —
30 —
= 4.5 V to AV
ref
= –20 to +75°C (regular specifications),
a
= 3.0 V to AV
ref
= –40 to +85°C (wide-range specifications)
a
Condition B Condition C
Min Max Min
30 — 40
10 — 10
— 20 —
— 20 —
— 20 —
Max Unit Test Conditions
60 ns Figure 22-72 to
Figure 22-79
— ns
— ns
— ns
— ns
— ns Figure 22-76
— ns Figure 22-74
— ns
— ns Figure 22-80
30 ns
100 ns
60 ns Figure 22-81
,
CC
, V = AV = 0V, ø = 2 to 13 MHz, T
CC SS SS
Max Unit Test Conditions
— ns Figure 22-85
—
40 Figure 22-84
40 ns Figure 22-82
40 Figure 22-83
a