Refresh Control - Renesas H8S Series Hardware Manual

16-bit single-chip microcomputer

Hide thumbs Also See for H8S Series:

Table of Contents

Refresh Control

The H8S/2357 Group is provided with a DRAM refresh control function. Either of two refreshing methods can be

selected: CAS-before-RAS (CBR) refreshing, or self-refreshing.

CAS-before-RAS (CBR) Refreshing: To select CBR refreshing, set the RFSHE bit in DRAMCR to 1, and clear the

RMODE bit to 0.

With CBR refreshing, RTCNT counts up using the input clock selected by bits CKS2 to CKS0 in DRAMCR, and when

the count matches the value set in RTCOR (compare match), refresh control is performed. At the same time, RTCNT is

reset and starts counting again from H'00. Refreshing is thus repeated at fixed intervals determined by RTCOR and bits

CKS2 to CKS0. Set a value in RTCOR and bits CKS2 to CKS0 that will meet the refreshing interval specification for the

When bits CKS2 to CKS0 are set, RTCNT starts counting up. RTCNT and RTCOR settings should therefore be

completed before setting bits CKS2 to CKS0.

Do not clear the CMF flag when refresh control is being performed (RFSHE = 1).

RTCNT operation is shown in figure 6-23, compare match timing in figure 6-24, and CBR refresh timings in figure 6-25.

Refresh request

Refresh request signal

and CMF bit setting signal

Figure 6-23 RTCNT Operation

Figure 6-24 Compare Match Timing

Rev.6.00 Oct.28.2004 page 147 of 1016

REJ09B0138-0600H