Renesas H8S Series Hardware Manual page 541

Table 14-12 SCI Interrupt Sources
Interrupt
Channel Source
0 ERI
RXI
TXI
TEI
1 ERI
RXI
TXI
TEI
2 ERI
RXI
TXI
TEI
Note: * This table shows the initial state immediately after a reset. Relative priorities among channels can be changed by
means of ICR and IPR.
A TEI interrupt is requested when the TEND flag is set to 1 while the TEIE bit is set to 1. The TEND flag is cleared at the
same time as the TDRE flag. Consequently, if a TEI interrupt and a TXI interrupt are requested simultaneously, the TXI
interrupt may be accepted first, with the result that the TDRE and TEND flags are cleared. Note that the TEI interrupt
will not be accepted in this case.
Description
Interrupt due to receive error
(ORER, FER, or PER)
Interrupt due to receive data full
state (RDRF)
Interrupt due to transmit data empty
state (TDRE)
Interrupt due to transmission end
(TEND)
Interrupt due to receive error
(ORER, FER, or PER)
Interrupt due to receive data full
state (RDRF)
Interrupt due to transmit data empty
state (TDRE)
Interrupt due to transmission end
(TEND)
Interrupt due to receive error
(ORER, FER, or PER)
Interrupt due to receive data full
state (RDRF)
Interrupt due to transmit data empty
state (TDRE)
Interrupt due to transmission end
(TEND)
DTC DMAC
Activation Activation
Not Not
possible possible
Possible Possible
Possible Possible
Not Not
possible possible
Not Not
possible possible
Possible Possible
Possible Possible
Not Not
possible possible
Not Not
possible possible
Possible Not
possible
Possible Not
possible
Not Not
possible possible
Rev.6.00 Oct.28.2004 page 513 of 1016
Priority*
High
Low
REJ09B0138-0600H