Interrupt Exception Handling Sequence - Renesas H8S/2100 Series Hardware Manual

Section 5 Interrupt Controller
5.6.3

Interrupt Exception Handling Sequence

Figure 5.10 shows the interrupt exception handling sequence. The example shown is for the case
where interrupt control mode 0 is set in advanced mode, and the program area and stack area are
in on-chip memory.
Figure 5.10 Interrupt Exception Handling
Rev. 1.00 Apr. 28, 2008 Page 124 of 994
REJ09B0452-0100