Renesas H8S Series Hardware Manual page 430

16-bit single-chip microcomputer
Hide thumbs Also See for H8S Series:
Table of Contents

Advertisement

TCFV Flag/TCFU Flag Setting Timing: Figure 10-44 shows the timing for setting of the TCFV flag in TSR by overflow
occurrence, and TCIV interrupt request signal timing.
Figure 10-45 shows the timing for setting of the TCFU flag in TSR by underflow occurrence, and TCIU interrupt request
signal timing.
ø
TCNT input
clock
TCNT
(overflow)
Overflow
signal
TCFV flag
TCIV interrupt
ø
TCNT
input clock
TCNT
(underflow)
Underflow signal
TCFU flag
TCIU interrupt
Rev.6.00 Oct.28.2004 page 402 of 1016
REJ09B0138-0600H
H'FFFF
Figure 10-44 TCIV Interrupt Setting Timing
H'0000
Figure 10-45 TCIU Interrupt Setting Timing
H'0000
H'FFFF

Advertisement

Table of Contents
loading

Table of Contents