Single Address Mode - Renesas H8S Series Hardware Manual

7.5.5

Single Address Mode

Single address mode can only be specified for channel B. This mode can be specified by setting the SAE bit in DMABCR
to 1 in short address mode.
One address is specified by MAR, and the other is set automatically to the data transfer acknowledge pin (DACK). The
transfer direction can be specified by the DTDIR in DMACR.
Table 7-9 summarizes register functions in single address mode.
Table 7-9 Register Functions in Single Address Mode
Register
23
DACK pin
15
Legend:
MAR: Memory address register
IOAR: I/O address register
ETCR: Transfer count register
DTDIR:Data transfer direction bit
DACK: Data transfer acknowledge
Note: * See the operation descriptions in sections 7.5.2, Sequential Mode, 7.5.3, Idle Mode, and 7.5.4, Repeat Mode.
MAR specifies the start address of the transfer source or transfer destination as 24 bits.
IOAR is invalid; in its place the strobe for external devices (DACK) is output.
Rev.6.00 Oct.28.2004 page 204 of 1016
REJ09B0138-0600H
DTDIR = 0 DTDIR = 1 Initial Setting
0 Source
address
MAR
register
Write
strobe
0
Transfer counter
ETCR
Function
Destination Start address of
address transfer destination
register or transfer source
Read (Set automatically
strobe by SAE bit; IOAR is
invalid)
Number of transfers *
Operation
*
Strobe for external
device