Renesas H8S Series Hardware Manual page 304

Pin
P1 /PO10/TIOCC0/
2
TCLKA
Rev.6.00 Oct.28.2004 page 276 of 1016
REJ09B0138-0600H
Selection Method and Pin Functions
The pin function is switched as shown below according to the combination of
the TPU channel 0 setting by bits MD3 to MD0 in TMDR0, bits IOC3 to IOC0 in
TIOR0L, bits CCLR2 to CCLR0 in TCR0, bits TPSC2 to TPSC0 in TCR0 to
TCR5, bit NDER10 in NDERH, and bit P12DDR.
TPU Channel
0 Setting
P12DDR
NDER10
Pin function
Notes: 1. TIOCC0 input when MD3 to MD0 = B'0000, and IOC3 to IOC0 =
B'10××.
2. TCLKA input when the setting for TCR0 to TCR5 is: TPSC2 to
TPSC0 = B'100;
TCLKA input when channels 1 and 5 are set to phase counting
mode.
TPU Channel
0 Setting (2)
MD3 to MD0 B'0000
IOC3 to IOC0 B'0000
B'0100
B'1×××
CCLR2 to —
CCLR0
Output —
function
Note: 3. TIOCD0 output is disabled.
When BFA = 1 or BFB = 1 in TMDR0, output is disabled and setting
(2) applies.
Table Below (1)
—
—
TIOCC0 output
TCLKA input *
(1) (2)
B'001×
B'0001 to B'××00
B'0011
B'0101 to
B'0111
— —
Output —
compare
output
Table Below (2)
0 1
— 0
P1 P1 PO10
2 2
input output output
1
TIOCC0 input *
2
(1) (1) (2)
B'0010 B'0011
Other than B'××00
— Other B'101
than
B'101
PWM PWM
mode 1 mode 2
3
output* output
×: Don't care
1
1
—