Renesas H8S Series Hardware Manual page 930

16-bit single-chip microcomputer
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NDRL—Next Data Register L
(1) When pulse output group output triggers are the same
(a) Address: H'FF4D
Bit
Initial value
Read/Write
(b) Address: H'FF4F
Bit
Initial value
Read/Write
(2) When pulse output group output triggers are different
(a) Address: H'FF4D
Bit
Initial value
Read/Write
(b) Address: H'FF4F
Bit
Initial value
Read/Write
Rev.6.00 Oct.28.2004 page 902 of 1016
REJ09B0138-0600H
:
7
6
NDR7
NDR6
:
0
0
:
R/W
R/W
Stores the next data for pulse output groups 1 and 0
:
7
6
:
1
1
:
:
7
6
NDR7
NDR6
:
0
0
:
R/W
R/W
Stores the next data for pulse output group 1
:
7
6
:
1
1
:
H'FF4D (FF4F)
5
4
3
NDR5
NDR4
NDR3
0
0
0
R/W
R/W
R/W
5
4
3
1
1
1
5
4
3
NDR5
NDR4
0
0
1
R/W
R/W
5
4
3
NDR3
1
1
0
R/W
Stores the next data for pulse output group 0
PPG
2
1
0
NDR0
NDR2
NDR1
0
0
0
R/W
R/W
R/W
2
1
0
1
1
1
2
0
1
1
1
1
2
1
0
NDR2
NDR1
NDR0
0
0
0
R/W
R/W
R/W

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