Register Configuration - Renesas H8S Series Hardware Manual

7.1.5

Register Configuration

Table 7-3 summarizes the DMAC registers.
Table 7-3 DMAC Registers
Channel Name
0 Memory address register 0A
I/O address register 0A
Transfer count register 0A
Memory address register 0B
I/O address register 0B
Transfer count register 0B
1 Memory address register 1A
I/O address register 1A
Transfer count register 1A
Memory address register 1B
I/O address register 1B
Transfer count register 1B
0, 1 DMA write enable register
DMA terminal control register DMATCR
DMA control register 0A
DMA control register 0B
DMA control register 1A
DMA control register 1B
DMA band control register
Module stop control register
Note: * Lower 16 bits of the address.
Rev.6.00 Oct.28.2004 page 170 of 1016
REJ09B0138-0600H
Initial
Abbreviation R/W Value
MAR0A R/W Undefined H'FEE0
IOAR0A R/W Undefined H'FEE4
ETCR0A R/W Undefined H'FEE6
MAR0B R/W Undefined H'FEE8
IOAR0B R/W Undefined H'FEEC
ETCR0B R/W Undefined H'FEEE
MAR1A R/W Undefined H'FEF0
IOAR1A R/W Undefined H'FEF4
ETCR1A R/W Undefined H'FEF6
MAR1B R/W Undefined H'FEF8
IOAR1B R/W Undefined H'FEFC
ETCR1B R/W Undefined H'FEFE
DMAWER R/W H'00
R/W H'00
DMACR0A R/W H'00
DMACR0B R/W H'00
DMACR1A R/W H'00
DMACR1B R/W H'00
DMABCR R/W H'0000
MSTPCR R/W H'3FFF
Address* Bus Width
16 bits
16 bits
16 bits
16 bits
16 bits
16 bits
16 bits
16 bits
16 bits
16 bits
16 bits
16 bits
H'FF00 8 bits
H'FF01 8 bits
H'FF02 16 bits
H'FF03 16 bits
H'FF04 16 bits
H'FF05 16 bits
H'FF06 16 bits
H'FF3C 8 bits