Renesas H8S Series Hardware Manual page 894

P6DDR—Port 6 Data Direction Register
Bit
Initial value
Read/Write
PADDR—Port A Data Direction Register
Bit
Initial value
Read/Write
PBDDR—Port B Data Direction Register
Bit
Initial value
Read/Write
PCDDR—Port C Data Direction Register
Bit
Initial value
Read/Write
Rev.6.00 Oct.28.2004 page 866 of 1016
REJ09B0138-0600H
:
7 6
P67DDR P66DDR P65DDR
:
0 0
:
W W
Specify input or output for individual port 6 pins
:
7 6
PA7DDR PA6DDR
:
0 0
:
W W
Specify input or output for individual port A pins
:
7 6
PB7DDR PB6DDR
:
0 0
:
W W
Specify input or output for individual port B pins
:
7 6
PC7DDR PC6DDR
:
0 0
:
W W
Specify input or output for individual port C pins
H'FEB5
5 4 3
P64DDR P63DDR
0 0 0
W W W
H'FEB9
5 4
PA5DDR PA4DDR PA3DDR
0 0
W W W
H'FEBA
[On-chip ROM version Only]
5 4 3
PB5DDR PB4DDR PB3DDR
0 0 0
W W W
H'FEBB
[On-chip ROM version Only]
5 4 3
PC5DDR PC4DDR PC3DDR
0 0 0
W W W
Port 6
2 1
P62DDR P61DDR
0 0
W W
Port A
3 2 1
PA2DDR PA1DDR
0 0 0
W W
Port B
2 1
PB2DDR PB1DDR
0 0
W W
Port C
2 1
PC2DDR PC1DDR
0 0
W W
0
P60DDR
0
W
0
PA0DDR
0
W
0
PB0DDR
0
W
0
PC0DDR
0
W