Register Configuration (On-Chip Rom Version Only) - Renesas H8S Series Hardware Manual

16-bit single-chip microcomputer
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9.10.2

Register Configuration (On-Chip ROM Version Only)

Table 9-17 shows the port C register configuration.
Table 9-17 Port C Registers
Name
Port C data direction register
Port C data register
Port C register
Port C MOS pull-up control register
Note: * Lower 16 bits of the address.
Port C Data Direction Register (PCDDR) (On-Chip ROM Version Only)
Bit
:
7
PC7DDR PC6DDR PC5DDR PC4DDR PC3DDR PC2DDR PC1DDR PC0DDR
Initial value :
0
R/W
:
W
PCDDR is an 8-bit write-only register, the individual bits of which specify input or output for the pins of port C. PCDDR
cannot be read; if it is, an undefined value will be read.
PCDDR is initialized to H'00 by a power-on reset and in hardware standby mode. It retains its prior state after a manual
reset*, and in software standby mode. The OPE bit in SBYCR is used to select whether the address output pins retain their
output state or become high-impedance when a transition is made to software standby mode.
Note: * Manual reset is only supported in the H8S/2357 ZTAT.
• Mode 7
Setting a PCDDR bit to 1 makes the corresponding port C pin an output port, while clearing the bit to 0 makes the pin
an input port.
• Mode 6
Setting a PCDDR bit to 1 makes the corresponding port C pin an address output, while clearing the bit to 0 makes the
pin an input port.
• Modes 4 and 5
The corresponding port C pins are address outputs irrespective of the value of the PCDDR bits.
Port C Data Register (PCDR) (On-Chip ROM Version Only)
Bit
:
7
PC7DR
Initial value :
0
R/W
:
R/W
PCDR is an 8-bit readable/writable register that stores output data for the port C pins (PC
PCDR is initialized to H'00 by a power-on reset, and in hardware standby mode. It retains its prior state after a manual
reset*, and in software standby mode.
6
5
0
0
W
W
W
6
5
PC6DR
PC5DR
PC4DR
0
0
R/W
R/W
R/W
Abbreviation
R/W
PCDDR
W
PCDR
R/W
PORTC
R
PCPCR
R/W
4
3
2
0
0
0
W
W
4
3
2
PC3DR
PC2DR
0
0
0
R/W
R/W
Initial Value
Address *
H'00
H'FEBB
H'00
H'FF6B
Undefined
H'FF5B
H'00
H'FF72
1
0
0
0
W
W
1
0
PC1DR
PC0DR
0
0
R/W
R/W
to PC
).
7
0
Rev.6.00 Oct.28.2004 page 313 of 1016
REJ09B0138-0600H

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