Renesas H8S Series Hardware Manual page 965

ADCR—A/D Control Register
Bit
Initial value
Read/Write
Timer Trigger Select
TRGS1
Note: * Applies to the H8S/2398, H8S/2394, H8S/2392, and H8S/2390.
These bits are reserved, so should always be written with 1.
DADR0—D/A Data Register 0
DADR1—D/A Data Register 1
Bit
Initial value
Read/Write
:
7 6
TRGS1 TRGS0
:
0 0
:
R/W R/W
TRGS1
0 0
A/D conversion start by external trigger is disabled
1
A/D conversion start by external trigger (TPU) is enabled
0
A/D conversion start by external trigger (8-bit timer) is enabled
1
1 A/D conversion start by external trigger pin (ADTRG) is enabled
:
7 6
:
0 0
:
R/W R/W
H'FF99
5 4 3
— — —
1 1 1
— — —/(R/W)*
Description
H'FFA4
H'FFA5
5 4 3
0 0 0
R/W R/W R/W
Stores data for D/A conversion
A/D
2 1
— —
1 1
—/(R/W)* —
D/A
D/A
2 1
0 0
R/W R/W R/W
Rev.6.00 Oct.28.2004 page 937 of 1016
REJ09B0138-0600H
0
—
1
—
0
0