Renesas H8S Series Hardware Manual page 528

Data Transfer Operations:
• Multiprocessor serial data transmission
Figure 14-10 shows a sample flowchart for multiprocessor serial data transmission.
The following procedure should be used for multiprocessor serial data transmission.
Write transmit data to TDR and
Clear DR to 0 and set DDR to 1
Rev.6.00 Oct.28.2004 page 500 of 1016
REJ09B0138-0600H
Initialization
Start transmission
Read TDRE flag in SSR
TDRE= 1
Yes
set MPBT bit in SSR
Clear TDRE flag to 0
All data transmitted?
Yes
Read TEND flag in SSR
TEND= 1
Yes
Break output?
Yes
Clear TE bit in SCR to 0
<End>
Figure 14-10 Sample Multiprocessor Serial Transmission Flowchart
[1]
SCI initialization:
[1]
The TxD pin is automatically
designated as the transmit data
output pin.
After the TE bit is set to 1,
a frame of 1s is output, and
[2]
transmission is enabled.
[2]
SCI status check and transmit
No
data write:
Read SSR and check that the
TDRE flag is set to 1, then write
transmit data to TDR. Set the
MPBT bit in SSR to 0 or 1.
Finally, clear the TDRE flag to 0.
[3]
Serial transmission continuation
procedure:
To continue serial transmission,
be sure to read 1 from the TDRE
flag to confirm that writing is
No
[3]
possible, then write data to TDR,
and then clear the TDRE flag to
0. Checking and clearing of the
TDRE flag is automatic when the
DMAC or DTC is activated by a
transmit data empty interrupt
(TXI) request, and data is written
to TDR.
No
[4]
Break output at the end of serial
transmission:
To output a break in serial
transmission, set the port DDR to
No
[4]
1, clear DR to 0, then clear the
TE bit in SCR to 0.