Module Stop Control Register (Mstpcr) - Renesas H8S Series Hardware Manual

16-bit single-chip microcomputer

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Bit 5—D/A Enable (DAE): The DAOE0 and DAOE1 bits both control D/A conversion. When the DAE bit is cleared to

0, the channel 0 and 1 D/A conversions are controlled independently. When the DAE bit is set to 1, the channel 0 and 1

D/A conversions are controlled together.

Output of resultant conversions is always controlled independently by the DAOE0 and DAOE1 bits.

If the H8S/2357 Group enters software standby mode when D/A conversion is enabled, the D/A output is held and the

analog power current is the same as during D/A conversion. When it is necessary to reduce the analog power current in

software standby mode, clear both the DAOE0 and DAOE1 bits to 0 to disable D/A output.

Bits 4 to 0—Reserved: These bits cannot be modified and are always read as 1.

Module Stop Control Register (MSTPCR)

Initial value :

: R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W

MSTPCR is a 16-bit readable/writable register that performs module stop mode control.

When the MSTP10 bit in MSTPCR is set to 1, D/A converter operation stops at the end of the bus cycle and a transition is

made to module stop mode. Registers cannot be read or written to in module stop mode. For details, see section 21.5,

Module Stop Mode.

MSTPCR is initialized to H'3FFF by a reset and in hardware standby mode. It is not initialized in software standby mode.

Bit 10—Module Stop (MSTP10): Specifies the D/A converter module stop mode.

Rev.6.00 Oct.28.2004 page 558 of 1016

REJ09B0138-0600H

D/A converter module stop mode cleared

D/A converter module stop mode set

Channel 0 and 1 D/A conversions disabled

Channel 0 D/A conversion enabled

Channel 1 D/A conversion disabled

Channel 0 and 1 D/A conversions enabled

Channel 0 D/A conversion disabled

Channel 1 D/A conversion enabled

Channel 0 and 1 D/A conversions enabled

(Initial value)

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