Refresh Timer/Counter (Rtcnt) - Renesas H8S Series Hardware Manual

16-bit single-chip microcomputer
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Bit 3—Compare Match Interrupt Enable (CMIE): Enables or disables interrupt requests (CMI) by the CMF flag when
the CMF flag in DRAMCR is set to 1.
When refresh control is performed (RFSHE = 1), the CMIE bit is always cleared to 0.
Bit 3
CMIE
0
1
Bits 2 to 0—Refresh Counter Clock Select (CKS2 to CKS0): These bits select the clock to be input to RTCNT from
among 7 internal clocks obtained by dividing the system clock (ø). When the input clock is selected with bits CKS2 to
CKS0, RTCNT begins counting up.
Bit 2
CKS2
0
1
6.2.8

Refresh Timer/Counter (RTCNT)

Bit
:
7
Initial value :
0
R/W
:
R/W
RTCNT is an 8-bit readable/writable up-counter.
RTCNT counts up using the internal clock selected by bits CKS2 to CKS0 in DRAMCR.
When RTCNT matches RTCOR (compare match), the CMF flag in DRAMCR is set to 1 and RTCNT is cleared to H'00.
If the RFSHE bit in DRAMCR is set to 1 at this time, a refresh cycle is started. Also, if the CMIE bit in DRAMCR is set
to 1, a compare match interrupt (CMI) is generated.
RTCNT is initialized to H'00 by a power-on reset and in hardware standby mode. It is not initialized by a manual reset* or
in software standby mode.
Note: * Manual reset is only supported in the H8S/2357 ZTAT.
Description
Interrupt request (CMI) by CMF flag disabled
Interrupt request (CMI) by CMF flag enabled
Bit 1
Bit 0
CKS1
CKS0
0
0
1
1
0
1
0
0
1
1
0
1
6
5
0
0
R/W
R/W
Description
Count operation disabled
Count uses ø/2
Count uses ø/8
Count uses ø/32
Count uses ø/128
Count uses ø/512
Count uses ø/2048
Count uses ø/4096
4
3
2
0
0
0
R/W
R/W
R/W
(Initial value)
(Initial value)
1
0
0
0
R/W
R/W
Rev.6.00 Oct.28.2004 page 119 of 1016
REJ09B0138-0600H

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