Data Format - Renesas H8S Series Hardware Manual

16-bit single-chip microcomputer
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15.3.3

Data Format

Figure 15-3 shows the Smart Card interface data format. In reception in this mode, a parity check is carried out on each
frame, and if an error is detected an error signal is sent back to the transmitting end, and retransmission of the data is
requested. If an error signal is sampled during transmission, the same data is retransmitted.
When there is no parity error
When a parity error occurs
Legend:
Ds:
D0 to D7:
Dp:
DE:
The operation sequence is as follows.
[1] When the data line is not in use it is in the high-impedance state, and is fixed high with a pull-up resistor.
[2] The transmitting station starts transfer of one frame of data. The data frame starts with a start bit (Ds, low-level),
followed by 8 data bits (D0 to D7) and a parity bit (Dp).
[3] With the Smart Card interface, the data line then returns to the high-impedance state. The data line is pulled high with
a pull-up resistor.
[4] The receiving station carries out a parity check.
If there is no parity error and the data is received normally, the receiving station waits for reception of the next data.
If a parity error occurs, however, the receiving station outputs an error signal (DE, low-level) to request retransmission
of the data. After outputting the error signal for the prescribed length of time, the receiving station places the signal
line in the high-impedance state again. The signal line is pulled high again by a pull-up resistor.
[5] If the transmitting station does not receive an error signal, it proceeds to transmit the next data frame.
If it does receive an error signal, however, it returns to step [2] and retransmits the erroneous data.
Ds
D0
D1
D2
Ds
D0
D1
D2
Start bit
Data bits
Parity bit
Error signal
Figure 15-3 Smart Card Interface Data Format
D3
D4
D5
D6
Transmitting station output
D3
D4
D5
D6
Transmitting station output
D7
Dp
D7
Dp
DE
Receiving station
output
Rev.6.00 Oct.28.2004 page 525 of 1016
REJ09B0138-0600H

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