Pin States In Idle Cycle - Renesas H8S Series Hardware Manual

16-bit single-chip microcomputer
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6.8.3

Pin States in Idle Cycle

Table 6-8 shows pin states in an idle cycle.
Table 6-8
Pin States in Idle Cycle
Notes: 1. Remains low in DRAM space RAS down mode or a refresh cycle.
2. n = 0 to 7
3. m = 0, 1
Pins
Pin State
A
to A
Contents of next bus cycle
23
0
D
to D
High impedance
15
0
CSn*
2
High*
CAS
High
AS
High
RD
High
HWR
High
LWR
High
DACKm*
3
High
1
Rev.6.00 Oct.28.2004 page 157 of 1016
REJ09B0138-0600H

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