Renesas H8S Series Hardware Manual page 905

RAMER—RAM Emulation Register
Bit
Initial value
Read/Write
MAR0AH—Memory Address Register 0AH
MAR0AL—Memory Address Register 0AL
Bit
MAR0AH
Initial value
Read/Write
Bit
MAR0AL
Initial value
Read/Write
IOAR0A—I/O Address Register 0A
Bit
IOAR0A
Initial value
Read/Write
: 7 6
— —
: 0 0
: — —
: 31 30 29 28
: — — — —
: 0 0 0 0
: — — — —
15 14 13 12
:
:
:
* * * *
: R/W R/W R/W R/W R/W
In short address mode: Specifies transfer source/transfer destination address
In full address mode: Specifies transfer source address
:
15 14 13 12
:
:
* * * *
:
R/W R/W R/W R/W R/W
In short address mode: Specifies transfer source/transfer destination address
In full address mode: Not used
H'FEDB
(for H8S/2357F-ZTAT only)
5 4
— — —
0 0
— — —
RAM Select, Flash Memory Area
RAMS RAM1 RAM0
× ×
0
1 0 0
1
1 0
1
H'FEE0
H'FEE2
27 26 25 24 23
— — — —
0 0 0 0
*
— — — — R/W
11 10 9 8 7
* * * * *
R/W R/W R/W R/W
H'FEE4
11 10 9 8 7
* * * * *
R/W R/W R/W R/W
Bus Controller
3 2 1
RAMS RAM1
0 0
0
R/W R/W
Area
H'FFDC00 to H'FFDFFF
H'000000 to H'0003FF
H'000400 to H'0007FF
H'000800 to H'000BFF
H'000C00 to H'000FFF
×: Don't care
DMAC
DMAC
22 21 20 19 18
* * * * *
R/W R/W R/W R/W R/W
6 5 4 3 2
* * * * *
R/W R/W R/W R/W R/W
* : Undefined
DMAC
6 5 4 3 2
* * * * *
R/W R/W R/W R/W R/W
* : Undefined
Rev.6.00 Oct.28.2004 page 877 of 1016
0
RAM0
0
R/W
17 16
* *
R/W R/W
1 0
* *
R/W R/W
1 0
* *
R/W R/W
REJ09B0138-0600H