Renesas H8S Series Hardware Manual page 67

Type Instruction
Bit- BST
manipulation
instructions
BIST
Branch Bcc
instructions
JMP
BSR
JSR
RTS
System control TRAPA
instructions
RTE
SLEEP
LDC
STC
1
Size* Function
C → (<bit-No.> of <EAd>)
B
Transfers the carry flag value to a specified bit in a
general register or memory operand.
¬ C → (<bit-No.> of <EAd>)
B
Transfers the inverse of the carry flag value to a
specified bit in a general register or memory operand.
The bit number is specified by 3-bit immediate data.
— Branches to a specified address if a specified condition
is true. The branching conditions are listed below.
Mnemonic
BRA(BT)
BRN(BF)
BHI
BLS
BCC(BHS)
BCS(BLO)
BNE
BEQ
BVC
BVS
BPL
BMI
BGE
BLT
BGT
BLE
— Branches unconditionally to a specified address.
— Branches to a subroutine at a specified address.
— Branches to a subroutine at a specified address.
— Returns from a subroutine.
— Starts trap-instruction exception handling.
— Returns from an exception-handling routine.
— Causes a transition to a power-down state.
(EAs) → CCR, (EAs) → EXR
B/W
Moves the source operand contents or immediate data
to CCR or EXR. Although CCR and EXR are 8-bit
registers, word-size transfers are performed between
them and memory. The upper 8 bits are valid.
CCR → (EAd), EXR → (EAd)
B/W
Transfers CCR or EXR contents to a general register or
memory. Although CCR and EXR are 8-bit registers,
word-size transfers are performed between them and
memory. The upper 8 bits are valid.
Description Condition
Always (true) Always
Never (false) Never
C ∨ Z = 0
High
C ∨ Z = 1
Low or same
Carry clear C = 0
(high or same)
Carry set (low) C = 1
Not equal Z = 0
Equal Z = 1
Overflow clear V = 0
Overflow set V = 1
Plus N = 0
Minus N = 1
N ⊕ V = 0
Greater or equal
N ⊕ V = 1
Less than
Z∨(N ⊕ V) = 0
Greater than
Z∨(N ⊕ V) = 1
Less or equal
Rev.6.00 Oct.28.2004 page 39 of 1016
REJ09B0138-0600H