Section 13 Watchdog Timer; Overview; Features - Renesas H8S Series Hardware Manual

16-bit single-chip microcomputer
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13.1

Overview

The H8S/2357 Group has a single-channel on-chip watchdog timer (WDT) for monitoring system operation. The WDT
outputs an overflow signal (WDTOVF) if a system crash prevents the CPU from writing to the timer counter, allowing it
to overflow. At the same time, the WDT can also generate an internal reset signal for the H8S/2357 Group.
When this watchdog function is not needed, the WDT can be used as an interval timer. In interval timer operation, an
interval timer interrupt is generated each time the counter overflows.
13.1.1

Features

WDT features are listed below.
• Switchable between watchdog timer mode and interval timer mode
• WDTOVF output when in watchdog timer mode*
If the counter overflows, the WDT outputs WDTOVF. It is possible to select whether or not the entire H8S/2357
Group is reset at the same time. This internal reset can be a power-on reset or a manual reset.*
• Interrupt generation when in interval timer mode
If the counter overflows, the WDT generates an interval timer interrupt.
• Choice of eight counter clock sources.
Notes: 1. The WDTOVF pin function is not available in the F-ZTAT versions, and the H8S/2398, H8S/2394, H8S/2392,
and H8S/2390.
2. Manual reset is only supported in the H8S/2357 ZTAT.

Section 13 Watchdog Timer

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Rev.6.00 Oct.28.2004 page 453 of 1016
REJ09B0138-0600H

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