Renesas H8S Series Hardware Manual page 663

16-bit single-chip microcomputer

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Automatic SCI Bit Rate Adjustment: When boot mode is initiated, H8S/2398 F-ZTAT chip measures the low period of

the asynchronous SCI communication data (H'00) transmitted continuously from the host. The SCI transmit/receive format

should be set as follows: 8-bit data, 1 stop bit, no parity. The chip calculates the bit rate of the transmission from the host

from the measured low period, and transmits one H'00 byte to the host to indicate the end of bit rate adjustment. The host

should confirm that this adjustment end indication (H'00) has been received normally, and transmit one H'55 byte to the

chip. If reception cannot be performed normally, initiate boot mode again (reset), and repeat the above operations.

Depending on the host's transmission bit rate and the chip's system clock frequency, there will be a discrepancy between

the bit rates of the host and the chip. To ensure correct SCI operation, the host's transfer bit rate should be set to 9,600 or

Table 19-36 shows typical host transfer bit rates and system clock frequencies for which automatic adjustment of the

MCU's bit rate is possible. The boot program should be executed within this system clock range.

Table 19-36 System Clock Frequencies for which Automatic Adjustment of H8S/2398

F-ZTAT Bit Rate is Possible

Host Bit Rate

Low period (9 bits) measured (H'00 data)

Figure 19-45 Automatic SCI Bit Rate Adjustment

System Clock Frequency for which Automatic Adjustment

of H8S/2398 F-ZTAT Bit Rate Is Possible

16 to 20 MHz

10 to 20 MHz

Rev.6.00 Oct.28.2004 page 635 of 1016

(1 or more bits)

REJ09B0138-0600H