Renesas H8S Series Hardware Manual page 972

TSTR—Timer Start Register
Bit
Initial value
Read/Write
Note:
TSYR—Timer Synchro Register
Bit
Initial value
Read/Write
Rev.6.00 Oct.28.2004 page 944 of 1016
REJ09B0138-0600H
:
7 6
— —
: 0 0
: — —
If 0 is written to the CST bit during operation with the TIOC pin designated for output,
the counter stops but the TIOC pin output compare output level is retained. If TIOR
is written to when the CST bit is cleared to 0, the pin output level will be changed to
the set initial output value.
:
7 6
— — SYNC5
:
0 0
:
— —
Notes: 1. To set synchronous operation, the SYNC bits for at least two channels must
be set to 1.
2. To set synchronous clearing, in addition to the SYNC bit, the TCNT clearing
source must also be set by means of bits CCLR2 to CCLR0 in TCR.
H'FFC0
5 4 3
CST5 CST4 CST3
0 0 0
R/W R/W R/W
Counter Start
0
1
H'FFC1
5 4 3
SYNC4 SYNC3
0
0 0
R/W R/W R/W
Timer Synchronization
0 TCNTn operates independently (TCNT presetting/
clearing is unrelated to other channels)
1 TCNTn performs synchronous operation
TCNT synchronous presetting/synchronous clearing
is possible
TPU
2 1
CST2 CST1 CST0
0 0
R/W R/W
TCNTn count operation is stopped
TCNTn performs count operation
TPU
2 1 0
SYNC2 SYNC1 SYNC0
0 0 0
R/W R/W R/W
(n = 5 to 0)
0
0
R/W
(n = 5 to 0)