Dma Band Control Register (Dmabcr) - Renesas H8S Series Hardware Manual

7.3.5

DMA Band Control Register (DMABCR)

Bit : 15
DMABCRH : FAE1
Initial value : 0
R/W : R/W
Bit : 7
DMABCRL : DTME1
Initial value : 0
R/W : R/W
DMABCR is a 16-bit readable/writable register that controls the operation of each DMAC channel.
DMABCR is initialized to H'0000 by a reset, and in standby mode.
Bit 15—Full Address Enable 1 (FAE1): Specifies whether channel 1 is to be used in short address mode or full address
mode.
In full address mode, channels 1A and 1B are used together as a single channel.
Bit 15
FAE1
0
1
Bit 14—Full Address Enable 0 (FAE0): Specifies whether channel 0 is to be used in short address mode or full address
mode.
In full address mode, channels 0A and 0B are used together as a single channel.
Bit 14
FAE0
0
1
Bits 13 and 12—Reserved: Can be read or written to. Write 0 to these bits.
Rev.6.00 Oct.28.2004 page 186 of 1016
REJ09B0138-0600H
14 13
FAE0 —
0 0
R/W R/W
6 5
DTE1 DTME0
0 0
R/W R/W
Description
Short address mode
Full address mode
Description
Short address mode
Full address mode
12 11 10
— DTA1 —
0 0 0
R/W R/W R/W
4 3 2
DTE0 DTIE1B DTIE1A
0 0 0
R/W R/W R/W
9 8
DTA0 —
0 0
R/W R/W
1 0
DTIE0B DTIE0A
0 0
R/W R/W
(Initial value)
(Initial value)