Register Configuration - Renesas H8S Series Hardware Manual

13.1.4

Register Configuration

The WDT has three registers, as summarized in table 13-2. These registers control clock selection, WDT mode switching,
and the reset signal.
Table 13-2 WDT Registers
Name
Timer control/status register
Timer counter
Reset control/status register
Notes: 1. Lower 16 bits of the address.
2. For details of write operations, see section 13.2.4, Notes on Register Access.
3. Only a write of 0 is permitted to bit 7, to clear the flag.
Abbreviation R/W
TCSR R/(W)*
TCNT R/W
RSTCSR R/(W)*
Initial Value Write*
3
H'18 H'FFBC
H'00 H'FFBC
3
H'1F H'FFBE
1
Address*
2
Read
H'FFBC
H'FFBD
H'FFBF
Rev.6.00 Oct.28.2004 page 455 of 1016
REJ09B0138-0600H