Reset; Overview; Reset Types - Renesas H8S Series Hardware Manual

16-bit single-chip microcomputer
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4.2

Reset

4.2.1

Overview

A reset has the highest exception priority.
When the RES pin goes low, all processing halts and the H8S/2357 Group enters the reset state. A reset initializes the
internal state of the CPU and the registers of on-chip supporting modules. Immediately after a reset, interrupt control
mode 0 is set.
Reset exception handling begins when the RES pin changes from low to high.
In the F-ZTAT, masked ROM, and ROMless versions, a reset is always a power-on reset, regardless of the NMI pin level
at the time. Also, a reset caused by the watchdog timer is always a power-on reset, regardless of the setting of the RSTS
bit in the RSTCR register.
In the ZTAT version, a reset may be either a power-on reset or a manual reset*, according to the NMI pin level at the time.
A reset caused by the watchdog timer, also, may be either a power-on reset or a manual reset*.
For details see section 13, Watchdog Timer.
Note: * Manual reset is only supported in the H8S/2357 ZTAT.
4.2.2

Reset Types

A reset can be of either of two types: a power-on reset or a manual reset*. Reset types are shown in table 4-3. A power-on
reset should be used when powering on.
The internal state of the CPU is initialized by either type of reset. A power-on reset also initializes all the registers in the
on-chip supporting modules, while a manual reset* initializes all the registers in the on-chip supporting modules except
for the bus controller and I/O ports, which retain their previous states.
With a manual reset*, since the on-chip supporting modules are initialized, ports used as on-chip supporting module I/O
pins are switched to I/O ports controlled by DDR and DR.
Table 4-3
Reset Types
Type
Power-on reset High
Manual reset*
A reset caused by the watchdog timer can also be of either of two types: a power-on reset or a manual reset*.
Note: * Manual reset is only supported in the H8S/2357 ZTAT.
Rev.6.00 Oct.28.2004 page 74 of 1016
REJ09B0138-0600H
Reset Transition
Conditions
RES
NMI
CPU
Low
Initialized Initialized
Low
Low
Initialized Initialized, except for bus controller and I/O ports
Internal State
On-Chip Supporting Modules

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