Section 9 I/O Ports; Overview - Renesas H8S Series Hardware Manual

Section 9 I/O Ports

9.1

Overview

The H8S/2357 Group has 12 I/O ports (ports 1, 2, 3, 5, 6, and A to G), and one input-only port (port 4).
Table 9-1 summarizes the port functions. The pins of each port also have other functions.
Each port includes a data direction register (DDR) that controls input/output (not provided for the input-only port), a data
register (DR) that stores output data, and a port register (PORT) used to read the pin states.
Ports A to E have a on-chip pull-up MOS function, and in addition to DR and DDR, have a MOS input pull-up control
register (PCR) to control the on/off state of MOS input pull-up.
Port 3 and port A include an open-drain control register (ODR) that controls the on/off state of the output buffer PMOS.
Ports 1, and A to F can drive a single TTL load and 90 pF capacitive load, and ports 2, 3, 5, 6, and G can drive a single
TTL load and 30 pF capacitive load. All the I/O ports can drive a Darlington transistor when in output mode. Ports 1, A,
B, and C can drive an LED (10 mA sink current).
Port 2, and pins 6 to 6 and A to A , are Schmitt-triggered inputs.
4 7 4 7
For block diagrams of the ports see Appendix C, I/O Port Block Diagrams.
Rev.6.00 Oct.28.2004 page 265 of 1016
REJ09B0138-0600H