Renesas H8S Series Hardware Manual page 772

16-bit single-chip microcomputer
Hide thumbs Also See for H8S Series:
Table of Contents

Advertisement

ø
CS5 to CS2
(RAS)
CAS
ø
A
to A
23
0
CS0
AS
RD
(read)
D
to D
15
0
(read)
Rev.6.00 Oct.28.2004 page 744 of 1016
REJ09B0138-0600H
T
Rp
t
CASD
Figure 22-77 Self-Refresh Timing
T
T
1
Figure 22-78 Burst ROM Access Timing (Two-State Access)
T
T
Rr
Rc
t
CSD2
or T
T
2
3
1
t
AD
t
AS
t
ASD
T
Rc
t
CSD2
t
CASD
T
2
t
AH
t
ASD
t
RSD2
t
t
t
RDS
RDH
ACC3

Advertisement

Table of Contents
loading

Table of Contents