Renesas H8S Series Hardware Manual page 409

16-bit single-chip microcomputer

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• When TGR is an input capture register

Figure 10-20 shows an operation example in which TGRA has been designated as an input capture register, and buffer

operation has been designated for TGRA and TGRC.

Counter clearing by TGRA input capture has been set for TCNT, and both rising and falling edges have been selected

as the TIOCA pin input capture input edge.

As buffer operation has been set, when the TCNT value is stored in TGRA upon occurrence of input capture A, the

value previously stored in TGRA is simultaneously transferred to TGRC.

Figure 10-20 Example of Buffer Operation (2)

Rev.6.00 Oct.28.2004 page 381 of 1016

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