Renesas H8S Series Hardware Manual page 154

16-Bit Access Space: Figure 6-5 illustrates data alignment control for the 16-bit access space. With the 16-bit access
space, the upper data bus (D
accessed at one time is one byte or one word, and a longword transfer instruction is executed as two word transfer
instructions.
In byte access, whether the upper or lower data bus is used is determined by whether the address is even or odd. The
upper data bus is used for an even address, and the lower data bus for an odd address.
Byte size
Byte size
Word size
Longword
size
Figure 6-5 Access Sizes and Data Alignment Control (16-Bit Access Space)
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to D ) and lower data bus (D
15 8
• Even address
• Odd address
1st bus cycle
2nd bus cycle
to D ) are used for accesses. The amount of data that can be
7 0
Upper data bus Lower data bus
D D D
15 8 7
D
0